PCB WIP - silk mask label was on the wrong side

This commit is contained in:
Marcus 2024-07-25 19:25:37 +02:00
parent 76c1bf08d6
commit f32e16d28b

View file

@ -24997,15 +24997,14 @@
(descr "Soldered wire connection, for a single 0.1 mm² wire, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator")
(tags "connector wire 0.1sqmm")
(property "Reference" "FAN2 PWM"
(at 0 2 0)
(layer "B.SilkS")
(at 0 2 -0)
(layer "F.SilkS")
(uuid "e67c4212-38b9-4f7c-886e-d12f64af7fdf")
(effects
(font
(size 0.8 0.8)
(thickness 0.1)
)
(justify mirror)
)
)
(property "Value" "SolderWire"